Amplifier

ABSTRACT

An amplifier comprising a field effect transistor, a terminating network comprising inductors connected in series separated by capacitors connected in parallel, a filter and a load, wherein the values of the capacitors and inductors are arranged to present open circuits to a predetermined number of odd harmonics of a signal frequency being amplified, and to present short circuits to a predetermined number of even harmonics of the signal frequency, wherein the normalised values of the inductors and capacitors of the terminating network are selected using the following procedure: Let g r =C r  r odd=L r  r even then g 1 =1, g 1 g 2 =(a); g r g r+1 =(b), r=2→2m−1 and g 2m g 2m+1 =(c) where (m−1) represents the predetermined number of odd harmonics which are presented with an open circuit 
     
       
         
           
             
               
                 
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The present invention relates to an amplifier.

Amplifiers, and especially power amplifiers are commonly constructedusing a transistor. Referring to FIG. 1, a field effect transistor maybe thought of as a channel of variable width which connects a source toa drain. A gate is provided between the source and the drain, chargebeing supplied to the gate (the gate is electrically effectively anon-linear capacitor). When charge is supplied to the gate, theaccumulated charge produces an electric field which extends from thegate, thereby establishing control over current that flows between thesource and the drain. Supplying a small negative charge to the gate willallow a small current to flow between the source and the drain, whereassupplying a more positive charge will allow a larger current to flowbetween the source and the drain.

The relationship between the charge supplied to the gate and the currentwhich flows to the drain is non-linear. This non-linearity causesproblems in circuit design, and circuit designers commonly attempt tocontrol the operation of the transistor by providing a ‘terminatingnetwork’ after the transistor.

It is common to attempt to control the effects of nonlinearitiesgenerated by a transistor such that a half wave rectified sin wavecurrent, and a approximation to a square wave voltage are present in thetransistor, in order to maximise amplifier efficiency. An approximationto a square wave voltage is used because a true square wave cannot beobtained due to the residual output capacitance of the transistor. For agiven fundamental signal frequency, the approximated square wave voltageis generated by presenting short circuits to even harmonics of thefundamental and presenting open circuits to odd harmonics of thefundamental. The half wave rectified sine wave current is generated fromeven harmonics of the fundamental, which are generated by the same shortcircuits and open circuits. The current and voltage waveforms arearranged so that their overlap is minimal. Power will only be dissipatedin the transistor when there is overlap between the current and voltage.If overlap between current and voltage is avoided completely, then intheory this should provide 100% efficiency. However, the presence ofresistive and reactive elements in the transistor and the terminatingnetwork means that 100% efficiency cannot be achieved, since there isalways some overlap between the current and voltage waveforms.

Usually the terminating network comprises a combination of circuitelements having values which are estimated using numerical techniques tocorrect the transistor output to a reasonably linear output and toprovide optimum efficiency. A problem associated with this approach isthat the numerical techniques do not necessarily provide an optimumsolution. In addition the numerical techniques suffer from thedisadvantage that they are based upon approximations which do not holdtrue for optimum operation of the transistor, and consequently provide aterminating network which gives an output which has a compromisedefficiency.

It is an object of the present invention to provide a method ofproviding an amplifier which overcomes the above disadvantages.

According to a first aspect of the invention there is provided anamplifier comprising a field effect transistor with output capacitanceC₁ a terminating network comprising inductors connected in seriesseparated by capacitors connected in parallel, a filter and a load,wherein the values of the capacitors and inductors are arranged topresent open circuits to a predetermined number of odd harmonics of asignal frequency being amplified, and to present short circuits to apredetermined number of even harmonics of the signal frequency, whereinthe normalised values of the inductors and capacitors of the terminatingnetwork are selected using the following procedure:

Let  g_(r) = C_(r)  r  odd      = L_(r)  r  even then${g_{1} = 1},\mspace{11mu}{{g_{1}g_{2}} = \frac{1}{m\left( {{2m} - 1} \right)}}$${g_{r}g_{r + 1}} = {{\frac{4}{\left( {{2m} - 1 + r} \right)\left( {{2m} - r} \right)}\mspace{14mu} r} = \left. 2\rightarrow{{2m} - 1} \right.}$and ${g_{2m}g_{{2m} + 1}} = \frac{1}{m}$where (m−1) represents the predetermined number of odd harmonics whichare presented with an open circuit.

It will be appreciated that the term ‘open circuit’ is not intended tomean a perfect open circuit, but rather to mean close enough to being anopen circuit to allow the amplifier to function correctly. Similarly,the term ‘short circuit’ is not intended to mean a perfect shortcircuit. The term ‘normalised’ is intended to mean normalised withrespect to the drain source capacitance of the field effect transistor(related to the frequency of operation) and with respect to theoperating impedance level (related to the required output impedance,e.g. 50 ohms).

According to a second aspect of the invention there is provided anamplifier comprising a field effect transistor and a terminatingnetwork, the terminating network being configured to present opencircuits to (m−1) odd harmonics of a signal to be amplified, theterminating network further being configured to allow the field effecttransistor to operate at an optimum efficiency such that the drainsource voltage of the field effect transistor includes peaks located atthe following phases:

$\theta_{r} = {{\frac{r\;\pi}{\left( {m + 1} \right)}\mspace{14mu} r} = \left. 1\rightarrow{m.} \right.}$θ=0, π corresponds to the drain source voltage being at the DC biaspoint.

A specific embodiment of the invention will now be described by way ofexample only with reference to the accompanying figures, in which:

FIG. 1 is a schematic illustration of a conventional transistor;

FIG. 2 is a schematic illustration of a transistor and a terminatingnetwork;

FIG. 3 is a half wave rectified sine wave;

FIG. 4 is a circuit diagram showing an amplifier which embodies theinvention (m=3, defined below);

FIG. 5 is a set of circuit diagrams showing terminating networks foramplifiers which embody the invention;

FIG. 6 is an oscilloscope trace showing the temporal variation of drainvoltage and gate voltage at the output of a field effect transistor ofan amplifier which embodies the invention;

FIG. 7 is an oscilloscope trace showing the temporal variation of drainvoltage and gate voltage at the output of a field effect transistor ofan amplifier which embodies the invention;

FIG. 8 is a Smith chart obtained for the output impedance seen by anamplifier which embodies the invention;

FIG. 9 is a schematic illustration of a pseudomorphic high electronmobility field effect transistor which forms part of an embodiment ofthe invention;

FIG. 10 shows the D.C. characteristics of the transistor of FIG. 9;

FIG. 11 is a schematic illustration of the physical construction of anamplifier which embodies the invention;

FIG. 12 is a circuit diagram of the amplifier shown in FIG. 11;

FIG. 13 shows the output voltage of the amplifier operating in a linearregime;

FIG. 14 shows a load line for the amplifier of FIG. 13;

FIG. 15 shows a load line for an amplifier constructed according to theinvention;

FIG. 16 shows a load line for an amplifier constructed according to theinvention, illustrating non-linear operation of the amplifier;

FIG. 17 is a half wave rectified sine wave together with a square wave;

FIG. 18 is a load line for an amplifier which has not been constructedaccording to the invention; and

FIG. 19 shows the output voltage for an amplifier constructed accordingto the invention (m=2).

A field effect transistor comprises a source and a drain separated by agate, as shown in FIG. 1. The gate controls the flow of current from thesource to the drain. When charge is supplied to the gate an electricfield extends from the gate into semiconductor located beneath the gate,thereby controlling a channel through which current flows from thesource to the drain. The amount of current that flows from the source tothe drain is a nonlinear function of the charge on the gate.

The invention maximises the efficiency of operation of the field effecttransistor (referred to hereafter simply as the ‘transistor’) andprovides a terminating network which optimises the output of thetransistor. A transistor and terminating network is shown schematicallyin FIG. 2. The input to the transistor is shown as being a combinationof charge and voltage. The charge provided to the gate is of primaryimportance since it is the charge supplied to the gate, and not thevoltage directly at the gate, that is the physical property thatcontrols the flow of current between the source and the drain.

In a theoretical high efficiency amplifier construction, current andvoltage are switched on and off and are arranged so that they neveroverlap temporally. Since there is no overlap between current andvoltage in the transistor, no power is dissipated by the transistor, andthe transistor operates at 100% efficiency. However, the transistor andcomponents of the terminating network include resistive and reactiveelements, and it is not possible to provide a terminating network whichallows the transistor to operate with 100% efficiency. In other words,there is always an unavoidable overlap between current and voltage whichwill lead to a reduction of efficiency. For example the maximumefficiency that can be provided by a Class B amplifier is π/4. Theinvention allows an amplifier to be constructed which provides themaximum achievable efficiency for a given harmonic termination.

The invention avoids the use of numerical and empirical techniques basedupon a set of approximations, as is done in the prior art. Instead theinvention is based upon a theoretical analysis of the transistor and theterminating network which includes only one assumption, i.e. that thedrain current has the form of a half wave rectified sine wave (FIG. 3).Although in practice the current may not be exactly of this form, it ispossible to keep the current close to this form, so that the assumptionholds true to a sufficient extent to allow the theory to be implementedin practice.

The voltage waveform is an approximation to a square wave which isgenerated by adding together odd harmonics of a signal. It is notpossible to obtain a perfect square wave of voltage because there is acapacitance between the drain and source of the transistor. Thiscapacitance is found in all transistors and is unavoidable. Theinvention takes account of this capacitance by including it as part ofthe terminating network, for example see C_(ds) in FIG. 2. Thecapacitance between the drain and the source is fairly linear, and socan be modelled as a conventional capacitor.

It is a common misconception that the drain source capacitance of thetransistor limits the upper frequency of operation of the transistor.This is incorrect. In fact, the drain source capacitance limits thebandwidth over which the transistor will work (a different conceptentirely).

An amplifier constructed according to the invention is shownschematically in FIG. 4. The amplifier comprises a transistor T andassociated drain source capacitance C_(ds), and a terminating networkcomprising a matching network N_(M) comprising inductors and capacitorsarranged to short circuit even harmonics of a signal and to open circuitodd harmonics of the signal, a shunt resonator S_(R) arranged totransmit the signal without harmonics, and a load R_(L). The termmatching network is intended to mean the set of inductors and capacitorsN_(M), whereas terminating network is intended to mean the matchingnetwork together with the shunt resonator S_(R) and the load R_(L). Itis known from the prior art to construct an amplifier circuit of thetype shown in FIG. 4. The invention allows precise determination of thevalues of the inductors and capacitors of the network N_(M), and of theload R_(L).

Prior art terminating networks based upon circuits of the form shown inFIG. 4 have attempted to generate odd signal harmonics at fixedamplitudes, the amplitudes being selected such that the odd harmonicsadd together to provide a square wave form. Numerical techniques areused to estimate values of the inductors, capacitors and load which willprovide the harmonics at the required amplitudes. The inventor hasrealised that this approach is entirely wrong, and that provided thatthe transistor is operating at the correct operating point (i.e. thecorrect amplitude of the fundamental signal is present in thetransistor), the terminating network does not need to dictate theamplitudes of the odd harmonics of the signal. The amplitudes of the oddharmonics of signal will find their own levels.

The amplitude of the fundamental signal in the transistor is key toensuring that the transistor is operating at the correct operating point(the fundamental signal is referred to hereafter as the fundamental).The required operating point is the point at which the amplitude of thevoltage at the fundamental is sufficiently large that odd harmonics havebeen introduced into the voltage, thereby approximating the voltage to asquare wave, but no distortion has been introduced into the drain sourcecurrent I_(DS) (i.e. that the assumption that the current is a half waverectified sine wave holds true).

Using theoretical analysis which is described further below, theinventor has found the required voltage amplitude at the fundamental forthe correct operating point to be:

$A_{1} = {\frac{2}{\left( {m + 1} \right)}{\cot\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack}}$where m−1 is the number of odd harmonics that are sustained by theterminating network. This is a remarkable result defining the maximumamplitude of the fundamental component of voltage. The amplitude is anormalised amplitude, and in an implementation of the amplifier will bescaled by the bias voltage V_(DC) (i.e. V=V_(DC)A₁).

When the resistor operates at the correct operating point, it willprovide the maximum efficiency of:

$\eta = {\frac{\pi}{2\left( {m + 1} \right)}{\cot\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack}}$

These two equations are universal, and are dependent only upon theterminating conditions (i.e. the number of odd harmonics that aresustained by the terminating network). The equations may be applied toany field effect transistors. The equations are unaffected by thepresence of finite reactances at harmonics at 2 m and above, and theresulting coupling of the current waveform to the voltage waveform.Furthermore, where higher ordered harmonics are terminated in finitereactive impedances the same maximum efficiency is obtained, providedthat the correct complex termination at the fundamental frequency isused.

The use of the term ‘m’ is clarified as follows:

-   m=1 corresponds to the fundamental frequency (ω_(o))-   m=2 corresponds to the first odd harmonic of the fundamental    frequency (3 ω_(o))-   m=3 corresponds to the second odd harmonic and the first odd    harmonic (3 ω_(o), 5 ω_(o))-   m=4 corresponds to the third, second and first odd harmonics:(3    ω_(o), 5 ω_(o), 7 ω_(o)), etc.

The inventor has devised a set of rules which are used to determine thevalues of the capacitors and inductors of the matching network, togetherwith an equation which determines the value of the load, to provide anamplifier which operates with maximum efficiency. The set of rules usedto determine the values of the capacitors and inductors of the matchingnetwork is as follows (the theoretical basis for these rules is set outfurther below):

Let  g_(r) = C_(r)  r  odd      = L_(r)  r  even then${g_{1} = 1},\mspace{11mu}{{g_{1}g_{2}} = \frac{1}{m\left( {{2m} - 1} \right)}}$${g_{r}g_{r + 1}} = {{\frac{4}{\left( {{2m} - 1 + r} \right)\left( {{2m} - r} \right)}\mspace{14mu} r} = \left. 2\rightarrow{{2m} - 1} \right.}$and ${g_{2m}g_{{2m} + 1}} = \frac{1}{m}$

The value of the first capacitor C_(ds) is a property of the transistor(the drain source capacitance of the transistor) and cannot be adjusted.For this reason, the values of the inductors and capacitors arenormalised to the first capacitor C_(ds). For a given circuit actualvalues of the inductors and capacitors may be determined by multiplyingby the value of C_(ds).

For a network arranged to open circuit the first two odd harmonics (i.e.3 ω_(o) and 5 ω_(o)) the values of the inductors and capacitors are asfollows:

-   -   m=3 (this corresponds to the first two odd harmonics)

g₁ = 1 → C_(ds) = C₁ = 1$r = {{1\mspace{14mu} C_{1}L_{2}} = {\frac{1}{3\left( {{2{x3}} - 1} \right)} = {\left. \frac{1}{15}\rightarrow L_{2} \right. = \frac{1}{15}}}}$$r = {{2\mspace{14mu} C_{3}L_{2}} = {\frac{4}{\left( {6 - 1 + 2} \right)\left( {6 - 2} \right)} = {\frac{4}{28} = {\left. \frac{1}{7}\rightarrow C_{3} \right. = {{\frac{1}{7} \times \frac{15}{1}} = \frac{15}{7}}}}}}$$r = {{3\mspace{14mu} C_{3}L_{4}} = {\frac{4}{\left( {6 - 1 + 3} \right)\left( {6 - 3} \right)} = {\frac{4}{24} = {\left. \frac{1}{6}\rightarrow L_{4} \right. = {{\frac{1}{6} \times \frac{7}{15}} = \frac{7}{90}}}}}}$$r = {{4\mspace{14mu} L_{4}C_{5}} = {\frac{4}{\left( {6 - 1 + 4} \right)\left( {6 - 4} \right)} = {\frac{4}{18} = {\left. \frac{2}{9}\rightarrow C_{5} \right. = {{\frac{2}{9} \times \frac{9}{70}} = \frac{20}{7}}}}}}$$r = {{5\mspace{14mu} C_{5}L_{6}} = {\frac{4}{\left( {6 - 1 + 5} \right)\left( {6 - 5} \right)} = {\frac{4}{10} = {\left. \frac{2}{5}\rightarrow L_{6} \right. = {{\frac{2}{5} \times \frac{7}{20}} = \frac{7}{50}}}}}}$$r = {{6\mspace{14mu} L_{6}C_{7}} = {\left. \frac{1}{3}\rightarrow C_{7} \right. = {{\frac{1}{3} \times \frac{50}{7}} = \frac{50}{21}}}}$

These values are shown in FIG. 5 c. FIGS. 5 a and 5 b show capacitor andinductor values determined for networks for m=2 (i.e. the first oddharmonic) and m=1 (i.e. the fundamental).

The network generated using the set of rules provides open circuits forodd harmonics and short circuits for even harmonics. In addition thenetwork acts as an impedance inverter at the fundamental frequency.

The network of FIG. 5 c has the property that the third and fifthharmonics have approximately three and five times the bandwidth of thefundamental frequency. This is an important property since whenamplifying a signal with finite bandwidth, three and five times thebandwidth are required at these harmonics in order to avoid distortionof the signal. Prior art matching networks do not have this advantageousproperty.

The value of the load seen at the output of the field effect transistoris determined using Ohm's law as follows:

$Z = {\frac{V}{I} = {\frac{V_{DC}A_{1}}{I_{MAX}/2} = \frac{2\left( {V_{DC}A_{1}} \right)}{I_{MAX}}}}$where V_(DC) is the bias voltage, A₁ is the normalised voltage amplitudeof the fundamental, and I_(MAX) is the maximum amplitude of the current(i.e. of the half wave rectified sine wave).

The field effect transistor sees the load through the matching networkand shunt resonator. The matching network and shunt resonator have theproperty that they are an impedance inverter at the fundamentalfrequency, which means that the impedance seen by the field effecttransistor is:

$Z = \frac{Z_{o}^{2}}{R_{L}}$

The shunt resonator S_(R) is constructed in the conventional way, toallow transmission at the fundamental frequency whilst blockingharmonics.

A specific practical embodiment of an amplifier constructed using therules devised by the inventor is described further below. In generalterms, to construct an amplifier using the rules, the number of oddharmonics which are to be presented with open circuits is determined(i.e. the value of m is determined), and the normalised values of thecapacitors and inductors of the terminating network are calculated. Theactual values of the capacitors and inductors are determined bymultiplying the normalised values by C_(ds). It will be appreciated thatsmall perturbations of the values of inductors and capacitors may ariseduring construction of the amplifier. These will not prevent theamplifier from functioning at the optimum point, and therefore are notconsidered to fall outside of the values provided by the set of rules.

Following this the normalised voltage amplitude of the fundamental iscalculated and used to determine the required value of the load. Theshunt resonator S_(R) is constructed in the conventional way to providetransmission at the fundamental frequency over the desired bandwidth.

Practical implementations of the amplifier are likely to includeunwanted reactive components in the terminating network. Some minoradjustment of the amplifier may be required in order correct for thesereactive components. The amplifiers may be constructed such that theload includes an output impedance tuner. The amplifier is turned on,with the load adjusted to be below the optimum value. The value of theload is gradually increased using the output impedance tuner, and thedrain source voltage of the transistor is monitored for characteristicpeaks (see below). Alternatively, the value of the output of theamplifier may be monitored, the load at which the output amplitudereaches the maximum being the optimum load value. As an alternative toadjusting the value of the load based upon a measured output, thecalculation of the load may be adjusted to take account of the reactivecomponents using the following equation:

$Z = {\frac{2V_{dc}}{I_{\max}}\left( {A_{1} + {jX}_{m}} \right)}$$X_{m} = {\frac{I_{\max}}{\pi\; V_{dc}}{\sum\limits_{n = m}^{\infty}{\frac{X\left( {2n} \right)}{\left( {{4n^{2}} - 1} \right)}{\frac{2n}{\left( {m + 1} \right)}\left\lbrack {{\cot\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} - {\cot\left\lbrack \frac{\left( {{2n} + 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}} \right\rbrack}}}}$together with impedance scaling.

In addition to adjustment of the load, the shunt resonator S_(R) locatedbetween the matching network N_(m) (see FIG. 4) and the resistor R_(L)may be adjusted to correct for reactive components. The adjustmentcomprises de-tuning the resonant frequency of the resonator veryslightly. This may be done by monitoring the drain source voltage of thetransistor, or the output of the amplifier. Alternatively the adjustmentmay be calculated using the equation given above.

Amplifiers have been constructed by the inventor, using theconfiguration shown in FIG. 4, with component values determined asdescribed above. FIG. 6 shows an output (drain source voltage) obtainedfrom a field effect transistor (FET), with a terminating networkarranged to open circuit the first odd harmonic (i.e. 3 ω_(o); m=2). Thefigure composes two oscilloscope traces, a first trace showing thevariation of drain source voltage with respect to time (labelled asV_(ds)), and a second trace showing the variation of input gate voltagewith respect to time (labelled as V_(gs)). For ease of terminology thetraces will be discussed in terms of phase, with vertical line X1indicating zero phase and vertical line X2 indicating 2π phase.

It can be seen in FIG. 6 that the voltage V is not a square wave, aswould be the case for a perfect amplifier, but instead is anapproximation to a square wave. The voltage waveform can be seen to haveclear peaks at π/3 and 2π/3. This is a characteristic of the FETperformance when the FET is operating at the optimal point, i.e. whenthe normalised voltage amplitude of the fundamental is:

$A_{1} = {\frac{2}{\left( {m + 1} \right)}{\cot\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack}}$

The characteristic peaks are very specific and clear. The characteristicpeaks may be used to tune the value of the load (described above), thelocation of the peaks indicating that the correct value of the load hasbeen found. Similarly, the characteristic peaks may be used to tune theresonant frequency of the shunt resonator.

The characteristic peaks stem directly from the selection of thecomponent values using the set of rules given above (this is provedmathematically further below). A given amplifier may be tested todetermine whether it is constructed using component values generatedusing the set of rules, by operating the amplifier and looking for thepresence of the characteristic peaks in the output of the FET.

Referring again to FIG. 6, in theory it should be possible to see dipsin the voltage V_(ds) at 4π/3 and 5π/3. However, the dips are obscuredbecause the voltage V_(ds) is sufficiently small that modifications ofthe voltage due to reactive components of the terminating network arelarger than the dips. The reactive components also give rise to theskewing of the voltage, such that the peak at π/30 is greater than thepeak at 2π/3.

FIG. 7 shows an output obtained from a FET with a terminating networkarranged to open circuit the first and second odd harmonic (i.e. 3 ω_(o)and 5 ω_(o); m=3). The voltage V_(ds) can be seen to have clear peaks atπ/4, π/2 and 3π/4. These characteristic peaks stem directly from theselection of the component values using the set of rules given above.

A general rule, derived mathematically below, indicates the phaselocations characteristic peaks for any value of m:

$\theta_{r} = {{\frac{r\;\pi}{\left( {m + 1} \right)}\mspace{31mu} r} = {1->m}}$

An amplifier which is constructed using component values generated withthe above set of rules will have peaks which conform to this rule.

FIG. 8 is a Smith chart, which characterises the impedance of theterminating network as seen by an amplifier constructed using the aboverules, the circuit being arranged to open circuit the first oddharmonic. The Smith chart represents real impedance (circles on thechart), and imaginary impedance (arcs on the chart), with the horizontalline along the centre of the chart representing zero phase (i.e. noimaginary impedance). Four operating points of the circuit are measured;these are shown on the chart as triangles 1 to 4.

Operating point number 4 is the fundamental frequency of operation ofthe amplifier. It can be seen that operating point number 4 is not onthe zero phase axis, in other words that it includes an imaginaryimpedance part. This is because the device is a modified class Famplifier (i.e. there is some coupling between the higher harmoniccurrents and voltages due to reactive components in the terminatingnetwork). Operating point number 3 is the first odd harmonic of thefundamental frequency (3 ω_(o)). The fact that operating point number 3is located towards the right hand side of the smith chart shows that aneffective open circuit is provided at the first harmonic, relative tothe low impedance level of the terminating network. Operating pointnumber 2 is the first even harmonic of the fundamental frequency (2ω_(o)), and can be seen to be a short circuit (i.e. located at the leftof the chart). This is as required the voltage should not include thefirst even harmonic as this will lead to a loss of efficiency. Operatingpoint number 1 is a lower frequency of no significance to theperformance of the amplifier.

A practical embodiment of a transistor and terminating networkconstructed according to the invention will now be described. In thisembodiment the field effect transistor is a PHEMT [Pseudomorphic HighElectron Mobility, Transistor], although it will be appreciated that theinvention may be embodied using any suitable field effect transistor.The PHEMT has the ability to deliver tens of watts of power at microwavefrequencies with a very low resistance in the output of the device. Asimplified equivalent PHEMT circuit is shown in FIG. 9. At the input102, the gate resistance is made as small as possible but the gatecapacitance C_(gs) 104 is a varactor whose capacitance at negative biasis comparable to the output drain-source capacitance C_(ds) 106 but canrise in the forward bias state to 6→10 times this value. At the output,the drain-source capacitance C_(ds) 106 is considered to be separableand always treated as part of the network. The remaining currentgenerator 108 which represents the drain-source channel current istherefore frequency independent, as described by the D.C.characteristics of the device as illustrated in FIG. 10, and isdependent upon both the gate and drain voltages. It is very important tonote that the channel resistance at low values of V_(ds) is of the orderof 0.1 Ω and typically ten times less than an LDMOS device.

In the subsequent analysis, the effect of the small channel resistanceis retained to illustrate the behaviour of the device but in all thetheoretical analysis it is assumed to be zero i.e. the characteristicshave infinite slope at the D.C. In addition, it is assumed that themaximum instantaneous voltage applied to the gate never saturates I_(ds)and hence the device acts as a linear amplifier.

Referring to FIG. 11, amplifier circuitry includes an input coupling inthe form of a conducting track 202 on a substrate 204. A dampingresistor 206 is connected between track 202 and ground. The resistor 206improves stability, by preventing small voltage fluctuations whichotherwise would be amplified into large voltage fluctuations by thefield effect transistor 170 (such fluctuations could lead tooscillation). Two chip capacitors 207, 208 are connected to the inputtrack 202 and to each other by bonded wires 230. These chip capacitorsprovide impedance matching between the track and the input to the fieldeffect transistor (FET) 170. The chip capacitors are connected by elevenbonded wires 209 to the gate terminals of power FET 170. The FET is a15.4 mm FET produced by Motorola, and is capable of handling 10 W ofpower. The eleven bonded wires 209 act as an inductor. An m=3 network172 is provided by three chip ceramic capacitors 210, 212, 214 connectedby bonded wires 220, 222, 224 which each provide an inductor. The lengthand geometry of the bonded wires 220, 222 and 224 determine theirinductance. In terms of implementation, the capacitors can be made onthe semiconductor wafer. In an alternative arrangement ceramics may beused to provide the inductors and capacitors.

The inherent drain-source capacitance C_(DS) of FET 170 provides thefirst capacitive element 226 of the network. A separate capacitivecomponent is not used, but rather the drain-source capacitance of theamplifier device provides an effective capacitance and so the componentsof the rest of the network must accommodate this inherent capacitance.The common drain terminals of the FET 170 are connected by the firstbonded wire inductor 220 to the first chip capacitor 210 of the network.Second and third inductors 222 and 224 connect the first 210 to thesecond 212 and the second 212 to the third 214 chip capacitors. Thethird capacitor is then connected to an output tract 228 on a substrate230. Small, secondary chip capacitors 232, 234, 236 can be providedconnected to the primary chip capacitors so as to correct or fine tunethe capacitance to that required for correct operation of theterminating network.

FIG. 12 shows a circuit diagram for the amplifier shown in FIG. 11,including additional components. An input 302 for receiving the signalto be amplified is followed by a bias tee 304. The bias tee 304 providesa means for biasing the amplifier with D.C. voltages without interferingwith the rf signal. The bias tee 304 biases the FET 170 towards a classB amplifier type bias point such that there is no quiescent current:i.e. the FET 170 draws no current when there is no rf signal supplied.Bias tee 304 sets the gate voltage V_(gs) and does not interfere withthe rf signal since it presents a very high input impedance to rfsignals.

An input impedance tuner 306 is provided as an intermediate impedanceconverter so as to help match the impedance of the input to that of theFET. As described above, resistor 206 (typically of order 100 ohms) isprovided to help stabilise the FET. Capacitors 207 and 208 provide acapacitance of approximately 8.6 pF, and in combination with inputinductor 209 provide further impedance matching to the input impedanceof the FET 170.

Turning to the output of the FET 170, the drain-source capacitanceC_(ds) 226 provides the first capacitive element of the m=3 matchingnetwork 172, the remainder of which is realised by chip capacitors 210,212, 214 and bonded wire inductors 220, 222, 224.

A shunt resonator 174 is provided at the output of the terminatingcircuit to provide a short circuit to signals to all harmonics above thefundamental frequency. The shunt resonator includes a capacitor 310 andinductor 312. Capacitor 314 prevents a DC short to ground, but allows rfto pass. The shunt resonator 174 plays a part in providing the shortcircuit for the second harmonic. That is, the shunt resonator 174 actstogether with the inductor 220 and capacitor 210 to short circuit thesecond harmonic.

An output impedance tuner 316 of conventional design is providedtogether with an output bias tee 318. The output bias tee 318 can handlecurrents of up to 2 A, but typically provides 15 A. Finally a resistiveload 176 is connected to the output of the bias tee 318.

The amplifier may operate at frequencies up to 10 GHz or higher.

The input impedance tuner 304 and output impedance tuner 316 may be usedto provide matching between the transistor and its input and output.Although component values for 1^(st) 2^(nd) and 3^(rd) order circuitsonly (i.e. m=1, 2 and 3) are described, the invention is not limited tothose orders. Appropriate component values for higher orders may bedetermined using the above set of rules. Although a particularrealisation of an m=3 terminating network has been described in detail,the construction of particular realisations of other order terminatingcircuits according to the invention will also be apparent to those ofordinary skill in the art, and the invention is not limited to theparticular realisation of the m=3 described above. It will beappreciated that the invention may be used with any suitable fieldeffect transistor.

The theoretical basis for equation 1 and for the rules used to determinethe values of the capacitors and the inductors will now be described.

As previously indicated, the theory includes one assumption, i.e. thatthe drain current has the form of a half wave rectified sine wave (FIG.3). Although in practice the current may not be exactly of this form, itis possible to keep the current close to this form, so that theassumption holds true to a sufficient extent to allow the theory to beimplemented in practice. A sine wave is used because the capacitance ofthe gate is such that it would be extremely difficult to make currentrise or fall at a rate greater than the slope of a sine wave.

The transistor has a non-zero DC level of drain source voltage. This isapplied by a separate DC bias. When a low resistive load R_(L) isconnected to the shunt resonator, this will result in a sine wavevoltage output, which does not deviate significantly from the DC level.The sine wave and the DC level are shown in FIG. 13. Under thisoperating condition the transistor operates linearly, and hascharacteristics indicated by the drain source current verses drainsource voltage graph shown in FIG. 14. It can be seen that once thedrain source current has risen above a threshold, the amount of currentoutput by the transistor is independent of the drain source voltage.However, at low drain source voltages there is a limit to the amount ofcurrent that is supplied for a given drain source voltage. The slope Srelates to the effective resistance of the channel between the drain andthe source. The voltage V_(DS) cannot go negative, since it isconstrained from doing so by the slope S (the slope S cannot bebreached). Since the amplitude of the voltage sine wave is low, thetransistor is providing an output power that is some way below itsmaximum.

What is required is to move away from the linear operation of thetransistor, and move to a non-linear point which, referring to FIG. 15,is the cusp C at which the load line turns over. In order to reach thispoint harmonics must be present in the transistor. This cannot happenwhen the transistor is operating as shown in FIG. 13, i.e. with a smallresistive load, since the voltage has the form of a sine wave at thefundamental frequency. What is required is that the amplitude of thevoltage sine wave becomes sufficient that it touches the V_(DS)=0 axis(V_(DS) cannot go negative) and begins to distort, thereby introducingharmonics into the voltage waveform. The physical mechanism that causesthe harmonics to arise is unimportant; all that is required is that theharmonics arise somehow or other. The amplitude of the voltage waveformshould be sufficient to generate an approximation to a square wave,without distortion of the waveform of the drain source current. Theoptimum operating point occurs when the drain source current is on thecusp of beginning to distort. This allows the transistor to operate withoptimum efficiency. Referring to FIG. 16, when the transistor operatesat the optimum point, significant values of voltage occur when thecurrent is close to zero, and significant values of current occur whenthe voltage is close to zero (as is required for optimum efficiency).The ripple seen at low voltages derives from the same circuit propertieswhich give rise to the ripples of voltage seen in FIGS. 6 and 7. Notethat the curve cannot pass through the slope S, as this is determined byphysical properties of the transistor channel.

The theory developed by the inventor is fundamentally different frompreviously devised numerical techniques. In a perfect terminatingnetwork the square wave voltage would not overlap at any point with thehalf-wave rectified sine wave current, as shown in FIG. 17. This meansthat there would be no relationship between the drain source current andthe drain source voltage. The numerical techniques used by the prior artare all based upon models which define relationships between the drainsource current and the drain source voltage, and are thus of limitedvalue.

The inventor has realised that it is not necessary to determine theamplitudes of the voltage waveform at the fundamental frequency and eachof the odd harmonics in the terminating circuit, as is done in numericalmodelling techniques. The inventor has realised that the only amplitudethat is important is the amplitude at the fundamental frequency, andthat the amplitudes of the odd harmonics will be automatically generatedby the terminating network. Optimum efficiency occurs when the correctamplitude of the fundamental is provided in the amplifier.

The solution is based upon determining the points at which the voltageV_(DS) is zero, and the derivative of the voltage is zero, i.e. thepoints at which the voltage touches zero as shown in FIG. 19.

Initially, a Class B amplifier operation is assumed with the transistoroperating linearly and not into saturation, with an terminating networkcapable of providing the correct termination for the maximum efficiencyof π/4. Increasing the resistive termination beyond the optimum pointresults in the current waveform no longer being a half wave rectifiedsine wave with a consequent reduction in efficiency. The maximumefficiency is achieved when the system equations are singular.

If the output of the transistor is terminated in a shunt inductor, toresonate the output capacitance at the fundamental frequency ω_(o), anda resistive load at ω_(o), then by biasing the gate voltage to cut-offat zero, we then have the classical Class B operation with all harmonicsshort circuited. Initially, it is assumed that the channel current is ahalf wave rectified sine wave with a Fourier Series expansion, asillustrated in FIG. 4, of:

$\begin{matrix}\begin{matrix}{I_{c} = {I_{\max}\left\lbrack {{\frac{1}{2}\sin\;\theta} + {\frac{1}{\pi}\left( {1 - {\frac{2}{3}\cos\; 2\theta} - {\frac{2}{15}\cos\; 4\theta} - {\frac{2}{35}\cos\; 6\theta\mspace{14mu}\ldots}}\mspace{11mu} \right)}} \right\rbrack}} \\{= {I_{\max}\left\lbrack {{\frac{1}{2}\sin\;\theta} + {\frac{1}{\pi}\left( {1 - {\sum\limits_{r = 1}^{\infty}\frac{2\;\cos\; 2r\;\theta}{\left( {{4r^{2}} - 1} \right)}}} \right\rbrack}} \right.}}\end{matrix} & (1)\end{matrix}$where θ=ω₀t, and where it is assumed that the circuit is biased anddecoupled in the normal way at D.C.

Since all harmonics are short circuited,V _(ds) =V _(dc)[1−A ₁ sin θ]  (2)

A₁ is proportional to the load resistor for A₁<<1 and the overallbehaviour can be characterised by the load line representation shown inFIG. 14.

As A₁=1 is reached, the critical behaviour is shown in FIG. 15 whereV_(ds)=0 at

$\theta = {\frac{\pi}{2}.}$At this point,

$\begin{matrix}{{{{Power}\mspace{14mu}{at}\mspace{14mu}{D.C.}} = {P_{dc} = \frac{V_{dc}I_{\max}}{\pi}}}{and}} & (3) \\{{{Power}\mspace{14mu}{at}\mspace{14mu}{fundamental}} = {P_{rf} = {\frac{A_{1}}{4}V_{dc}I_{\max}}}} & (4)\end{matrix}$and since A₁=1, efficiency is

$\begin{matrix}{\eta = {\frac{P_{rf}}{P_{dc}} = \frac{\pi}{4}}} & (5)\end{matrix}$which is the classical Class B result (i.e. the transistor operating atmaximum efficiency when there are no harmonics of voltage present).

If the load resistance is increased further, since the voltage waveformmay only have a D.C. component and a component at the fundamentalfrequency and may not become negative immediately from the I–Vcharacteristics, then A₁ must remain at unity and the current waveformmust be modified. The only possible behaviour is a sharp reduction inthe channel current I_(c) at θ=π/2. This may be approximated by a deltafunction at this point with a resulting Fourier Series of:

$\begin{matrix}{{F(\theta)} = {\frac{{- I_{\max}}\varepsilon}{2\pi}\left\lbrack {1 + {2\;\sin\;\theta} - {2\;\cos\; 2\theta} - {2\;\sin\; 3\theta} + {2\;\cos\; 4\theta} + {2\;\sin\; 5\theta\mspace{14mu}\ldots}}\mspace{11mu} \right\rbrack}} & (6)\end{matrix}$

Resulting in the overall current having components at all the harmonicfrequencies and:

$\begin{matrix}{{P_{dc} = {\left( {1 - \frac{\varepsilon}{2}} \right)\frac{V_{dc}I_{\max}}{\pi}}}{and}} & (7) \\{{P_{rf} = {\left( {1 - \frac{2\varepsilon}{\pi}} \right)\frac{V_{dc}I_{\max}}{4}}}{{Hence}\mspace{14mu}{efficiency}\text{:}}} & (8) \\{{\eta = {\left( \frac{1 - \frac{2\varepsilon}{\pi}}{1 - \frac{\varepsilon}{2}} \right)\frac{\pi}{4}}}{{which}\mspace{14mu}{is}\mspace{14mu}{less}\mspace{14mu}{than}\mspace{14mu}{\frac{\pi}{4}.}}} & (9)\end{matrix}$

What has actually happened in this situation is that as the resistiveload is increased in value, then the amplitude of the fundamentalcomponent of voltage A₁ has linearly increased to unity and thenremained constant at this value beyond that point. Hence, this point isa singular point and occurs at a unique value of θ=π/2 and representsthe maximum efficiency available. The above analysis may appear trivialbut it is the basis for the development of the optimum solutions forboth the Class F and modified Class F conditions.

To increase efficiency, harmonic components of voltage must be allowedto exist in the output circuit. This situation will now be investigatedby considering both the Class F and modified Class F situations.

Class F Operation

Initially, it will be assumed that all of the odd harmonics are opencircuited up to the 2m−1 harmonic (for example if m=3 then the first twoodd harmonics are open circuited, i.e. 3 ω_(o) and 5 ω_(o)). All higherodd harmonic and all even harmonics will be assumed to be terminated inshort circuits. Thus, again, we may assume that the current waveform isthe same as the Class B operation given in equation 1 for a linearoperation. The voltage waveform will now be of the form:

$\begin{matrix}{\frac{V_{ds}}{V_{dc}} = {1 - {\sum\limits_{q = 1}^{m}{A_{{2q} - 1}{\sin\left( {{2q} - 1} \right)}\theta}}}} & (10)\end{matrix}$

As the resistive load at the fundamental is increased, then A₁approaches unity as in the Class B case. Up to this point, there is noreason why the higher frequency components of the voltage waveformshould not be non zero, resulting in the load line shown in FIG. 18.Further increases in the load resistance could then allow A₁ to exceedunity.

Firstly, the current waveform cannot be distorted as in the Class Boperation as this would require current components at the lower oddharmonic frequencies. Secondly, the current cannot rise faster than thesinusoidal component at the fundamental frequency. Hence, the load linebecomes distorted and moves towards that shown in FIG. 16. There is noreason why the voltage components at the higher odd harmonic frequenciesshould have any particular value other than being constrained by theoverall I–V characteristic.

A₁ is initially proportional to the resistive termination at thefundamental frequency. As A₁ equals unity, we have the efficiency:

$\begin{matrix}{\eta = \frac{\pi}{4}} & (11)\end{matrix}$as A₁ increases with the load, if it could attain the value of 4/π thendeficiency would be unity which is clearly not attainable for finite m.Therefore, somewhere between these two values, a critical value for A₁must be obtained which will result in a maximum efficiency for a givenvalue of m. An initial investigation of equation (10) shows that thismay be zero at m values of θ which must be symmetrical around

$\theta = {\frac{\pi}{2}.}$Furthermore, from the I–V characteristic, it is clear that near anyzero, the voltage cannot be negative and hence each zero must be aturning point. Thus if:

$\begin{matrix}{{F(\theta)} = {1 - {\sum\limits_{q = 1}^{m}\;{A_{{2q} - 1}{\sin\left( {{2q} - 1} \right)}\theta}}}} & (12) \\{{{Then}\mspace{14mu}{F\left( \theta_{r} \right)}} = {{0\mspace{79mu} r} = \left. 1\rightarrow m \right.}} & (13) \\{{{Also},{{F^{\prime}\left( \theta_{r} \right)} = {{0\mspace{70mu} r} = \left. 1\rightarrow m \right.}}}\mspace{11mu}} & (14)\end{matrix}$

Due to the symmetry around

$\theta = \frac{\pi}{2}$the number of independent equations from (13) is

$\frac{m}{2}$for m even and

$\frac{m + 1}{2}$for m odd which must include

$\theta_{\frac{m + 1}{2}} = {\frac{\pi}{2}.}$However, there are m coefficients A_(2q−1), q=1→m. In principle, theremaining equations come from the set of equations (14). As the loadresistor is increased and the critical value of A₁ is obtained to yieldmaximum efficiency, then the system of equations must become singularand, in particular, A₁ must be determined from the set of equations (13)without directly being able to evaluate A_(2q−1) for q=2→m.

In the prior art, where numerical techniques have been deployed todetermine maximum efficiency, the problems associated with the system ofequations being solved are those related to a singular solution beingapproached.

Thus, there must exist a unique set of θ_(r), r=1→m, which results inthe determination of the critical value of A₁ where the whole system ofequations is singular.

In principle, one could assume an arbitrary set of zeros at which thesingular solution exists and then derive a unique set of zeros whichforce the singular solution. This approach is very complex and hence, analternative is presented whereby the answer is assumed and by using thisanswer, the system of equations is shown to be singular.

It will now be shown that this unique set of zeros is:

$\begin{matrix}{\theta_{r} = {{\frac{r\;\pi}{\left( {m + 1} \right)}\mspace{70mu} r} = \left. 1\rightarrow m \right.}} & (15)\end{matrix}$which from equations (12) and (13) results in:

$\begin{matrix}{0 = {{1 - {\sum\limits_{q = 1}^{m}\;{A_{{2q} - 1}{\sin\left\lbrack \frac{\left( {{2q} - 1} \right)r\;\pi}{\left( {m + 1} \right)} \right\rbrack}\mspace{70mu} r}}} = \left. 1\rightarrow m \right.}} & (16)\end{matrix}$

Multiplying each equation in turn by:

$\sin\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack$and adding, gives the single equation:

$\begin{matrix}{{\sum\limits_{r = 1}^{m}\;{\sin\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}} = {\sum\limits_{r = 1}^{m}\;{\sum\limits_{q = 1}^{m}\;{A_{{2q} - 1}{\sin\left\lbrack \frac{\left( {{2q} - 1} \right)r\;\pi}{m + 1} \right\rbrack}{\sin\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}}}}} & (17) \\{\mspace{160mu}{= {\sum\limits_{q = 1}^{m}\;{A_{{2q} - 1}H_{q}}}}} & (18) \\{where} & \; \\{H_{q} = {\sum\limits_{r = 1}^{m}\;{{\sin\left\lbrack \frac{\left( {{2q} - 1} \right)r\;\pi}{m + 1} \right\rbrack}{\sin\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}}}} & (19) \\{\mspace{31mu}{= {\frac{1}{2}{\sum\limits_{r = 1}^{m}\left\lbrack {{\cos\left\lbrack \frac{2\left( {q - 1} \right)r\;\pi}{m + 1} \right\rbrack} - {\cos\left\lbrack \frac{2q\; r\;\pi}{m + 1} \right\rbrack}} \right\rbrack}}}} & (20) \\{{{Let}\mspace{14mu} X_{n}} = {\sum\limits_{r = 1}^{m}\;{\cos\left\lbrack \frac{2n\; r\;\pi}{m + 1} \right\rbrack}}} & (21) \\{Then} & \; \\{{X_{n}{\sin\left\lbrack \frac{n\;\pi}{m + 1} \right\rbrack}} = {\sum\limits_{r = 1}^{m}\;{{\cos\left\lbrack \frac{2n\; r\;\pi}{m + 1} \right\rbrack}{\sin\left\lbrack \frac{n\;\pi}{m + 1} \right\rbrack}}}} & (22) \\{\mspace{146mu}{= {\frac{1}{2}{\sum\limits_{r = 1}^{m}\left\lbrack {{\sin\left\lbrack \frac{{n\left( {{2r} + 1} \right)}\;\pi}{m + 1} \right\rbrack} - {\sin\left\lbrack \frac{{n\left( {{2r} - 1} \right)}\;\pi}{m + 1} \right\rbrack}} \right\rbrack}}}} & \; \\{\mspace{146mu}{= {\frac{1}{2}\left\lbrack {{\sin\left\lbrack \frac{{n\left( {{2m} + 1} \right)}\;\pi}{m + 1} \right\rbrack} - {\sin\left\lbrack \frac{n\;\pi}{m + 1} \right\rbrack}} \right\rbrack}}} & \; \\{\mspace{146mu}{= {\frac{1}{2}\left\lbrack {{\sin\left\lbrack {{2n\;\pi} - \frac{n\;\pi}{m + 1}} \right\rbrack} - {\sin\left\lbrack \frac{n\;\pi}{m + 1} \right\rbrack}} \right\rbrack}}} & \; \\{\mspace{146mu}{= {- {\sin\left\lbrack \frac{n\;\pi}{m + 1} \right\rbrack}}}} & (23) \\{{Therefore},} & \; \\{X_{n} = {{{- 1}\mspace{70mu} n} \neq 0}} & (24) \\{{{but}\mspace{14mu}{from}\mspace{14mu}(20)},} & \; \\{H_{q} = {\frac{1}{2}\left\lfloor {X_{q - 1} - X_{q}} \right\rfloor}} & \; \\{\mspace{31mu}{= {{0\mspace{85mu} q} \neq 1}}} & (25)\end{matrix}$which is the fundamental condition for a singular solution.

Hence, substituting in equation (17)

$\begin{matrix}{{{\sum\limits_{r = 1}^{m}{\sin\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}} = {A_{1}{\sum\limits_{r = 1}^{m}{\sin^{2}\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}}}}{Let}} & (26) \\{{Y_{m} = {\sum\limits_{r = 1}^{m}{\sin\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}}}{then}\begin{matrix}{{Y_{m}{\sin\left\lbrack \frac{r\;\pi}{2\left( {m + 1} \right)} \right\rbrack}} = {\sum\limits_{r = 1}^{m}{{\sin\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}{\sin\left\lbrack \frac{r\;\pi}{2\left( {m + 1} \right)} \right\rbrack}}}} \\{= {\frac{1}{2}{\sum\limits_{r = 1}^{m}\left\lbrack {{\cos\left\lbrack \frac{\left( {{2r} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} - {\cos\left\lbrack \frac{\left( {{2r} + 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}} \right\rbrack}}} \\{= {\frac{1}{2}\left\lbrack {{\cos\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack} - {\cos\left\lbrack \frac{\left( {{2m} + 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}} \right\rbrack}} \\{= {\frac{1}{2}\left\lbrack {{\cos\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack} - {\cos\left\lbrack {\pi - \frac{\pi}{2\left( {m + 1} \right)}} \right\rbrack}} \right\rbrack}} \\{= {\cos\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack}}\end{matrix}{Therefore}} & (27) \\{Y_{m} = {\cot\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack}} & (28)\end{matrix}$

Returning to equation (26), let

$\begin{matrix}{Z_{m} = {\sum\limits_{r = 1}^{m}{\sin^{2}\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}}} \\{= {\frac{1}{2}{\sum\limits_{r = 1}^{m}\left\lbrack {1 - {\cos\left\lbrack \frac{2r\;\pi}{m + 1} \right\rbrack}} \right\rbrack}}} \\{= {\frac{m}{2} - {\frac{1}{2}{\sum\limits_{r = 1}^{m}{\cos\left\lbrack \frac{2r\;\pi}{m + 1} \right\rbrack}}}}}\end{matrix}$which from equations (21) and (24) for n=1 gives

$\begin{matrix}{Z_{m} = \frac{m + 1}{2}} & (29)\end{matrix}$

Substituting in equation (26) then yields

$\begin{matrix}{A_{1} = {\frac{2}{\left( {m + 1} \right)}{\cot\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack}}} & (30)\end{matrix}$which is a remarkable result defining the maximum amplitude of thefundamental component of voltage. This also gives the maximum efficiencyof:

$\begin{matrix}{\eta = {\frac{\pi}{2\left( {m + 1} \right)}{\cot\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack}}} & (31)\end{matrix}$which is universal and dependent only upon the terminating conditions.

Modified Class F Operation

Again, it will be assumed that all of the odd harmonics are opencircuited up to the 2m−1th harmonic (i.e. if m=3, up to 5 ω_(o)).Secondly, it will be assumed that all of the even harmonics are shortcircuited up to the (2m−2)th harmonic (i.e. if m=3, up to 4 ω_(o)).Finally, for all harmonics, 2m and above, it will be assumed that thevoltage and current waveforms are related by a set of reactances:X(n), n=2m→∞  (32)

This situation, as will be shown, corresponds to a termination capableof being obtained from a finite, linear, passive network.

Again, we assume that the current waveform is the same as the Class Boperation given in equation (1). The voltage waveform will now be of theform

$\begin{matrix}{\frac{V_{ds}}{V_{dc}} = {1 - {\sum\limits_{q = 1}^{m}{A_{{2q} - 1}{\sin\left( {{2q} - 1} \right)}\theta}} - {\frac{I_{\max}}{\pi\; V_{d\; c}}{\sum\limits_{n = m}^{\infty}{\frac{X\left( {2n} \right)}{\left( {{4n^{2}} - 1} \right)}\left\lbrack {{\sin\; 2n\;\theta} - {\sum\limits_{q = 1}^{m}{B_{n,{{2q} - 1}}{\cos\left( {{2q} - 1} \right)}\theta}}} \right\rbrack}}}}} & (33)\end{matrix}$

The additional terms arise from the finite reactances at the higher evenharmonics 2m and above coupling the even harmonic current terms intovoltages. For each such voltage term generated, cosine terms at the oddharmonics will also be generated up to the (2m−1)th harmonic.

From equation (33), the key additional functions are

${F_{n}(\theta)} = {{\sin\; 2n\;\theta} - {\sum\limits_{q = 1}^{m}{B_{n,{{2q} - 1}}{\cos\left( {{2q} - 1} \right)}\theta}}}$which due to the singular behaviour at the zeros

$\begin{matrix}{\theta_{r} = {{\frac{r\;\pi}{m + 1}\mspace{31mu} r} = {1->m}}} & (34)\end{matrix}$will have,F _(n)(θ_(r))=0  (35)andF′ _(n)(θ_(r))=0  (36)

In this case the unique singular solution comes from the set ofequations (36) resulting in

$\begin{matrix}{{2n\;{\cos\left( {2n\;\theta_{r}} \right)}} = {- {\sum\limits_{q = 1}^{m}{\left( {{2q} - 1} \right)B_{n,{{2q} - 1}}{\sin\left\lbrack {\left( {{2q} - 1} \right)\theta_{r}} \right\rbrack}}}}} & (37)\end{matrix}$

Multiplying each equation by

$\sin\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack$and adding gives

$\begin{matrix}{{2n{\sum\limits_{r = 1}^{m}{{\cos\left\lbrack \frac{2r\;\pi}{m + 1} \right\rbrack}{\sin\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}}}} = {- {\sum\limits_{q = 1}^{m}{\left( {{2q} - 1} \right)B_{n,{{2q} - 1}}{\sum\limits_{r = 1}^{m}{{\sin\left\lbrack \frac{\left( {{2q} - 1} \right)r\;\pi}{m + 1} \right\rbrack}{\sin\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}}}}}}} & (38)\end{matrix}$which from equation (25) reduces to

$\begin{matrix}{{2n{\sum\limits_{r = 1}^{m}{{\cos\left\lbrack \frac{2r\; n\;\pi}{m + 1} \right\rbrack}{\sin\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}}}} = {{- B_{n,1}}{\sum\limits_{r = 1}^{m}{\sin^{2}\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}}}} & (39) \\{= {B_{n,1}\frac{\left( {m + 1} \right)}{2}}} & (40)\end{matrix}$from equation (29).

$\begin{matrix}{{Let}\begin{matrix}{X_{n} = {\sum\limits_{r = 1}^{m}{{\cos\left\lbrack \frac{2r\; n\;\pi}{m + 1} \right\rbrack}{\sin\left\lbrack \frac{r\;\pi}{m + 1} \right\rbrack}}}} \\{= {\frac{1}{2}\left\lbrack {\sum\limits_{r = 1}^{m}\left\lbrack {{\sin\left\lbrack \frac{\left( {{2n} + 1} \right)r\;\pi}{m + 1} \right\rbrack} - {\sin\left\lbrack \frac{\left( {{2n} - 1} \right)r\;\pi}{m + 1} \right\rbrack}} \right\rbrack} \right\rbrack}}\end{matrix}} & (41) \\{{{Now}\mspace{14mu}{let}}{Y_{n} = {\sum\limits_{r = 1}^{m}{\sin\left\lbrack \frac{\left( {{2n} - 1} \right)r\;\pi}{m + 1} \right\rbrack}}}{{hence},}} & (42) \\{\begin{matrix}{{Y_{n}{\sin\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}} = {\sum\limits_{r = 1}^{m}{{\sin\left\lbrack \frac{\left( {{2n} - 1} \right)r\;\pi}{m + 1} \right\rbrack}{\sin\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}}}} \\{= {\frac{1}{2}{\sum\limits_{r = 1}^{m}\left\lbrack {{\cos\left\lbrack \frac{\left( {{2n} - 1} \right)\left( {{2r} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} -} \right.}}} \\\left. {\cos\left\lbrack \frac{\left( {{2n} - 1} \right)\left( {{2r} + 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} \right\rbrack \\{= {\frac{1}{2}\left\lbrack {{\cos\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} -} \right.}} \\\left. {\cos\left\lbrack \frac{\left( {{2n} - 1} \right)\left( {{2m} + 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} \right\rbrack \\{= {\frac{1}{2}\left\lbrack {{\cos\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} -} \right.}} \\\left. {\cos\left\lbrack {{\left( {{2n} - 1} \right)\pi} - \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)}} \right\rbrack} \right\rbrack \\{= {\cos\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}}\end{matrix}{Hence}} & (43) \\{Y_{n} = {\cot\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}} & (44)\end{matrix}$substituting into equation (41) yields

$\begin{matrix}{X_{n} = {\frac{1}{2}\left\lbrack {{\cot\left\lbrack \frac{\left( {{2n} + 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} - {\cot\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}} \right\rbrack}} & (45)\end{matrix}$which is in turn substituted into equation (40) to give

$\begin{matrix}{B_{n,1} = {\frac{2n}{\left( {m + 1} \right)}\left\lbrack {{\cot\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} - {\cot\left\lbrack \frac{\left( {{2n} + 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}} \right\rbrack}} & (46)\end{matrix}$

Hence the cos θ term in the voltage waveform at the fundamentalfrequency is

$\begin{matrix}{X_{m} = {\frac{I_{\max}}{\pi\; V_{dc}}{\sum\limits_{n = m}^{\infty}{\frac{X\left( {2n} \right)}{\left( {{4n^{2}} - 1} \right)}{\frac{2n}{\left( {m + 1} \right)}\left\lbrack {{\cot\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} - {\cot\left\lbrack \frac{\left( {{2n} + 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}} \right\rbrack}}}}} & (47)\end{matrix}$resulting in the overall complex impedance termination at thefundamental frequency for optimum efficiency being

$\begin{matrix}{\frac{2V_{dc}}{I_{\max}}\left( {A_{1} + {j\; X_{m}}} \right)} & (48)\end{matrix}$

The voltage waveform no longer possesses an odd characteristic aroundthe D.C. level. Hence the typical characteristic shown in FIG. 6 willsplit into a different trajectory for decreasing and increasing voltage,and the peaks will be at slightly different levels.

1. An amplifier comprising a field effect transistor with outputcapacitance C₁, a terminating network comprising inductors connected inseries separated by capacitors connected in parallel, a filter and aload, wherein the values of the capacitors and inductors are arranged topresent open circuits to a predetermined number of odd harmonics of asignal frequency being amplified, and to present short circuits to apredetermined number of even harmonics of the signal frequency, whereinthe normalised values of the inductors and capacitors of the terminatingnetwork are selected using the following procedure:${Let}\mspace{14mu}\begin{matrix}{g_{r} = C_{r}} & {r\mspace{14mu}{odd}} \\{= L_{r}} & {r\mspace{14mu}{even}}\end{matrix}$ then${g_{1} = 1},\mspace{130mu}{{g_{1}g_{2}} = \frac{1}{m\left( {{2m} - 1} \right)}}$$\mspace{194mu}{{g_{r}g_{r + 1}} = {{\frac{4}{\left( {{2m} - 1 + r} \right)\left( {{2m} - r} \right)}\mspace{31mu} r} = {2->{{2m} - 1}}}}$and $\mspace{166mu}{{g_{2m}g_{{2m} + 1}} = \frac{1}{m}}$ where (m−1)represents the predetermined number of odd harmonics which are presentedwith an open circuit.
 2. An amplifier according to claim 1, wherein thevalue of the load is selected such that the normalised amplitude of thefundamental signal frequency in the amplification means is:$A_{1} = {\frac{2}{\left( {m + 1} \right)}{\cot\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack}}$thereby allowing the amplifier to operate at an efficiency of:$\eta = {\frac{\pi}{2\left( {m + 1} \right)}{{\cot\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack}.}}$3. An amplifier according to claim 2, wherein the value of the load isdetermined from:${Z = \frac{2\left( {V_{DC}A_{1}} \right)}{I_{MAX}}},\mspace{31mu}{R_{L} = \frac{Z_{o}^{2}}{Z}},\mspace{31mu}{Z_{o} = {\frac{1}{\left( {{2m} - 1} \right)}.}}$4. An amplifier according to claim 3, wherein the value of the load isadjusted, to correct for reactive components generated by couplingbetween higher ordered harmonics of the signal frequency.
 5. Anamplifier according to claim 4, wherein the adjustment is made bymonitoring the drain source voltage of the amplifier, and observingcharacteristic peaks of the drain source voltage.
 6. An amplifieraccording to claim 4, wherein the adjustment is determined from:$\mspace{20mu}{{Z = {\frac{2V_{dc}}{I_{\max}}\left( {A_{1} + {j\; X_{m}}} \right)}},{X_{m} = {\frac{I_{\max}}{\pi\; V_{dc}}{\sum\limits_{n = m}^{\infty}{\frac{X\left( {2n} \right)}{\left( {{4n^{2}} - 1} \right)}{{\frac{2n}{\left( {m + 1} \right)}\left\lbrack {{\cot\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} - {\cot\left\lbrack \frac{\left( {{2n} + 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}} \right\rbrack}.}}}}}}$7. An amplifier according to claim 1, wherein the filter comprises ashunt resonator tuned to the signal frequency.
 8. An amplifier accordingto claim 7, wherein the shunt resonator is detuned from the signalfrequency, to correct for reactive components generated by couplingbetween higher ordered harmonics of the signal frequency.
 9. Anamplifier according to claim 8, wherein the adjustment is made bymonitoring the drain source voltage of the amplifier, and observingcharacteristic peaks of the drain source voltage.
 10. An amplifieraccording to claim 8, wherein the adjustment is determined from:$\mspace{20mu}{{Z = {\frac{2V_{dc}}{I_{\max}}\left( {A_{1} + {j\; X_{m}}} \right)}},{X_{m} = {\frac{I_{\max}}{\pi\; V_{dc}}{\sum\limits_{n = m}^{\infty}{\frac{X\left( {2n} \right)}{\left( {{4n^{2}} - 1} \right)}{{\frac{2n}{\left( {m + 1} \right)}\left\lbrack {{\cot\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} - {\cot\left\lbrack \frac{\left( {{2n} + 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}} \right\rbrack}.}}}}}}$11. An amplifier according to claim 1, wherein the normalised values ofthe capacitors and inductors are converted to real values by multiplyingthem by the value of the inherent drain source capacitance of the fieldeffect transistor.
 12. An amplifier according to claim 1, wherein theterminating network further comprises an output impedance tuner.
 13. Anamplifier according claim 1, wherein the amplifier further comprisesinductors and capacitors arranged to provide input impedance matching atan input of the field effect transistor.
 14. An amplifier according toclaim 1, wherein the inductors of the terminating network are formedfrom bonded wires.
 15. An amplifier according to claim 1, wherein theterminating network is formed from Low Temperature Co-Fired Ceramics(LTCC).
 16. An amplifier according to claim 1, wherein the field effecttransistor comprises a pseudomorphic high electron mobility transistor.17. An amplifier comprising a field effect transistor and a terminatingnetwork, the terminating network being configured to present opencircuits to (m−1) odd harmonics of a signal to be amplified, theterminating network further being configured to allow the field effecttransistor to operate at an optimum efficiency such that the drainsource voltage of the field effect transistor includes peaks located atthe following phases:$\theta_{r} = {{\frac{r\;\pi}{\left( {m + 1} \right)}\mspace{31mu} r} = {1->m}}$wherein the terminating network comprises inductors connected in seriesseparated by capacitors connected in parallel, a filter and a load,wherein the normalised values of the inductors and capacitors of theterminating network are selected using the following procedure:$\begin{matrix}{{{Let}\mspace{14mu} g_{r}} = {C_{r}\mspace{14mu} r\mspace{14mu}{odd}}} \\{= {L_{r}\mspace{14mu} r\mspace{14mu}{even}}}\end{matrix}$ then${g_{1} = 1},\mspace{25mu}{{g_{1}g_{2}} = \frac{1}{m\left( {{2m} - 1} \right)}}$${g_{r}g_{r + 1}} = {{\frac{4}{\left( {{2m} - 1 + r} \right)\left( {{2m} - r} \right)}\mspace{25mu} r} = {2->{{2m} - 1}}}$and ${g_{2m}g_{{2m} + 1}} = {\frac{1}{m}.}$
 18. An amplifier accordingto claim 17, wherein (m−1) represents the predetermined number of oddharmonics which are presented with an open circuit.
 19. An amplifieraccording to claim 18, wherein the value of the load is selected suchthat the normalised amplitude of the fundamental signal frequency in theamplification means is:$A_{1} = {\frac{2}{\left( {m + 1} \right)}{\cot\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack}}$thereby allowing the amplifier to operate at an efficiency of:$\eta = {\frac{\pi}{2\left( {m + 1} \right)}{{\cot\left\lbrack \frac{\pi}{2\left( {m + 1} \right)} \right\rbrack}.}}$20. An amplifier according to claim 19, wherein the value of the load isdetermined from:${Z = \frac{2\left( {V_{DC}A_{1}} \right)}{I_{MAX}}},\mspace{31mu}{R_{L} = \frac{Z_{o}^{2}}{Z}},\mspace{31mu}{Z_{o} = {\frac{1}{\left( {{2m} - 1} \right)}.}}$21. An amplifier according to claim 20, wherein the value of the load isadjusted, to correct for reactive components generated by couplingbetween higher ordered harmonics of the signal frequency.
 22. Anamplifier according to claim 21, wherein the adjustment is made bymonitoring the drain source voltage of the amplifier, and observingcharacteristic peaks of the drain source voltage.
 23. An amplifieraccording to claim 21, wherein the adjustment is determined from:$\mspace{20mu}{{Z = {\frac{2V_{dc}}{I_{\max}}\left( {A_{1} + {j\; X_{m}}} \right)}},{X_{m} = {\frac{I_{\max}}{\pi\; V_{dc}}{\sum\limits_{n = m}^{\infty}{\frac{X\left( {2n} \right)}{\left( {{4n^{2}} - 1} \right)}{{\frac{2n}{\left( {m + 1} \right)}\left\lbrack {{\cot\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} - {\cot\left\lbrack \frac{\left( {{2n} + 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}} \right\rbrack}.}}}}}}$24. An amplifier according to claim 18, wherein the filter comprises ashunt resonator tuned to the signal frequency.
 25. An amplifieraccording to claim 24, wherein the shunt resonator is detuned from thesignal frequency, to correct for reactive components generated bycoupling between higher ordered harmonics of the signal frequency. 26.An amplifier according to claim 25, wherein the adjustment is made bymonitoring the drain source voltage of the amplifier, and observingcharacteristic peaks of the drain source voltage.
 27. An amplifieraccording to claim 25, wherein the adjustment is determined from:$\mspace{20mu}{{Z = {\frac{2V_{dc}}{I_{\max}}\left( {A_{1} + {j\; X_{m}}} \right)}},{X_{m} = {\frac{I_{\max}}{\pi\; V_{dc}}{\sum\limits_{n = m}^{\infty}{\frac{X\left( {2n} \right)}{\left( {{4n^{2}} - 1} \right)}{{\frac{2n}{\left( {m + 1} \right)}\left\lbrack {{\cot\left\lbrack \frac{\left( {{2n} - 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack} - {\cot\left\lbrack \frac{\left( {{2n} + 1} \right)\pi}{2\left( {m + 1} \right)} \right\rbrack}} \right\rbrack}.}}}}}}$28. An amplifier according to claim 18, wherein the normalised values ofthe capacitors and inductors are converted to real values by multiplyingthem by the value of the inherent drain source capacitance of the fieldeffect transistor.
 29. An amplifier according to claim 18, wherein theterminating network further comprises an output impedance tuner.
 30. Anamplifier according to claim 18, wherein the amplifier further comprisesof inductors and capacitors arranged to provide input impedance matchingat an input of the field effect transistor.
 31. An amplifier accordingto claim 18, wherein the inductors of the terminating network are formedfrom bonded wires.
 32. An amplifier according to claim 18, wherein theterminating network is formed from Low Temperature Co-Fired Ceramics(LTCC).
 33. An amplifier according to claim 18, wherein the field effecttransistor comprises a pseudomorphic high electron mobility transistor.